Field Effect Transistors (FET) include metal oxide semiconductor FET (MOSFET) devices and junction FET (JFET) devices. Historically, the use of MOSFETs has been more widespread than that of JFETs. As a result of their widespread use, driver circuits and other circuits for MOSFETs are readily and economically available. One such circuit is a MOSFET based converter circuit.
A schematic of a typical MOSFET converter circuit 100 is shown in Prior Art FIG. 1. MOSFET converter circuit 100 includes a driver circuit 110, which functions as a gate driver. MOSFET gate driver 110 is configured to drive high side MOSFET Q102 and low side Q1 MOSFET Q101. Driver 110 generates high peak currents for switching the MOSFETs Q101 and Q102 on and off.
Resistors R111 and R112 are typically relatively small value resistors. Resistors R111 and R112 deter oscillations. The high side gate switching waveform V2 is in phase with the driver input signal V1. The low side gate switching waveform V3 is out of phase with input signal V1. A high output from driver U110 turns on the MOSFETs Q102 and Q101.
Converter circuit 103 has an output inductor L131 and output filter capacitor C141. The inductive-capacitive network of converter 103 convert the switching waveform of Q101 and Q102 to a DC output voltage Vo.
Although significant bias current is not needed at the gates of MOSFETs Q102 and Q101, in applying their full bias voltage, power is dissipated in resistors R111 and R112. This dissipation of power reduces the efficiency of driver circuit 100.
Junction field effect transistors (JFETs) are majority carrier devices that conduct current through a channel that is controlled by the application of a bias voltage to a p-n junction. Minimal on state drain-source resistance (RDSOn) characterizes efficient device performance. Low RDSOn is typically achieved with a significant DC driving current IBias providing the voltage to bias the FET.
Although MOSFET based circuitry is readily and economically available, a growing demand for JFET based circuitry has developed. In part, this is understandable from advances that have accompanied the adoption of submicron processes for device fabrication, such as operationally higher speeds and lower voltages. For instance, greater current demands in integrated circuits have resulted in JFET based circuitry, such as in power conditioning. Exemplary circuits include buck converters and switching power supplies.
Switching mode regulators are preferred to linear devices due to considerations related to efficiency. For instance, efficiency can be increased by operating a switch (e.g., the transistor) so that it is either fully on or fully off. Circuits used to drive a transistor for a switching application are designed with the goal of providing a fast transition between the “on” and “off” states of the transistor switch.
JFETs are capable of being driven by low voltages while maintaining excellent breakdown characteristics when compared to MOSFETs. There is no insulator associated with gate/drain and gate/source interfaces of a JFET (e.g., these interfaces comprise p-n junctions). Thus, forward bias results in conduction at voltages that are very low compared to the reverse bias that the device is capable of withstanding. JFETs also have a much greater resistance to damage from electrostatic discharge (ESD) than MOSFETs. Thus, JFET circuit use may be preferable to MOSFET circuits for a particular application.
Due to the fundamental differences between MOSFETs and JFETs, conventional MOSFET drivers such as circuit 100 are not well suited for driving JFETs. For instance, while MOSFETs may be biased without significant bias current IBias, modern JFET bias currents range from 1 to 200 mA.
One approach to providing sufficient JFET biasing current has been to provide a direct drive from a gate driver circuit. The voltage of such drivers can range in some applications from 5 to 12 V. A schematic of a conventional JFET direct drive gate driver circuit 200 is depicted in prior art FIG. 2. Direct JFET driver circuit 200 supplies high peak switching currents as well as the DC bias current in the range of 1 ma to 200 ma.
Circuit 200 directly drives JFET transistors Q203 and Q204 in that the DC bias current is supplied from the voltage driver U210 itself. Circuit 200 also provides negative voltage to the gates when the JFETs Q203 and Q204 are in an “off” state. This negative voltage keeps the JFET in a low leakage off state, which supports proper operation for depletion JFETs.
Capacitors C222 and C223 in the gate circuits 224 and 225, respectively, provide the high peak switching drive currents. Resistors 8233 and R234 set the DC gate bias currents. The negative voltage is generated because the positive voltage at the gate is clamped by a gate to source diode effect within each JFET when the driver voltage goes positive. MOSFETs, such as Q101 and Q102 (FIG. 1) do not have this built in diode effect between gate and source.
The high side gate switching waveform V4 is in phase with the driver input signal V1. The low side gate switching waveform V5 is out of phase with input signal V1. When the driver voltage swings to 0V, the voltage at the JFET gate swings to a negative voltage because it was clamped at +0.7V when the driver output voltage was high.
Converter circuit 203 has an output inductor L231 and output filter capacitor C241. The inductive-capacitive network of converter 203 converts the switching waveform of Q203 and Q204 to a DC output voltage Vo.
Circuit 200 functions to drive the JFETs Q203 and Q204. However, driving IBias directly can consume significant power, which can adversely affect the efficiency of the power supply. For instance, in applying full bias voltage to JFETs Q203 and Q204, the bias currents may dissipate significant power in resistors R233 and R234, which thus typically have relatively high wattage ratings.
This dissipation of power reduces the efficiency of such a conventional driver circuit. Further, their relatively high wattages render biasing resistors in such a driver circuit concomitantly large and require apparatus in which the circuit is disposed or deployed to dissipate the heat they generate. This can require larger size (e.g., form factor), heavier weight, and more robust thermal design for such an apparatus, all of which can reduce its economical manufacture and utility. These factors may thus delimit the range of application for such a circuit. Thus, the direct drive approach to biasing a JFET converter circuit can be inefficient, power intensive, and restrictive.